Exsedia's IPalette toolset makes it easier and faster for VHDL and Verilog designers to build high-quality large scale systems. In a top-down approach where there are existing multiple HDL components, IPalette allows you to use block diagrams to structure and partition your design, then add in the internal descriptions using the IPalette code editor and Nimbus behavioral descriptions. IPalette gives you structured VHDL or Verilog code-no more headaches tracing errors in connectivity between entity/architectures or modules. IPalette also lets you build systems bottom-up by allowing you to take existing VHDL architecture or Verilog module code blocks and behavioral descriptions created in Nimbus, and bind them to block diagrams which define your system's hierarchy. By binding system-level modules from your components, you can then maximize design reuse. view IPalette HTML view IPalette datasheet