News
July 29, 2004 DigiTimes- Taiwan

Exsedia, a Malaysian Electronic Design Automation (EDA) company, today introduced an IP design management tool called IPalette™ during EDA & Test Taiwan. IPalette works with the company’s front-end software solutions for ASIC and FPGA designs, enabling designers to visualize the hierarchical structure of large, complex systems.

IPalette presents a graphical view of a design hierarchy and serves as a common basis for design management and discussion, according to Yeo Beng Wah, manager of marketing and sales at Exsedia. He added that in design collaboration scenarios where complex designs are distributed across various teams, effective data management is crucial.

IPalette features high-level partitioning as well as integration of VHDL and Verilog modules. Designers can take existing VHDL architecture or Verilog module code and bind them to block diagrams. By binding system-level modules from existing components, designs can be reused more easily.

IPalette runs on Unix and Linux, and pricing starts at US$2,800.